4.8 Article

Vertical III-V Nanowire Device Integration on Si(100)

Journal

NANO LETTERS
Volume 14, Issue 4, Pages 1914-1920

Publisher

AMER CHEMICAL SOC
DOI: 10.1021/nl404743j

Keywords

Nanowires; III-V semiconductors; InAs; GaAs; Si; integration

Funding

  1. European Union [257267, 619509]
  2. Marie Curie Actions-Intra-European Fellowship (IEF-PHY) WISE [276595]

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We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically characterized. The results indicate a high uniformity and scalability in the fabrication process.

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