Journal
MICROELECTRONIC ENGINEERING
Volume 86, Issue 3, Pages 224-234Publisher
ELSEVIER SCIENCE BV
DOI: 10.1016/j.mee.2008.05.023
Keywords
High-K gate dielectrics; MOS devices; Interfacial transition regions; X-ray absorption spectroscopy; Spectroscopic ellipsometry; Di-vacancy defects; Native Ge dielectrics; Ge Substrates
Categories
Funding
- Div Of Electrical, Commun & Cyber Sys
- Directorate For Engineering [823805] Funding Source: National Science Foundation
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The contribution from a relatively low-K SiON (K similar to 6) interfacial transition region (ITR) between Si and transition metal high-K gate dielectric such as nanocrystalline HfO2 (K similar to 20), and non-crystalline Hf Si oxynitride (K similar to 10-12) places a significant limitation on equivalent oxide thickness (EOT) scaling. This limitation is equally Significant for metal-oxide-semiconductor capacitors and field effect transistors, MOSCAPs and MOSFETs, respectively, fabricated on Ge substrates. This article uses a novel remote plasma processing approach to remove native Ge ITRs and bond transition metal gate dielectrics directly onto crystalline Ge Substrates. Proceeding in this way we identify(i) the source of significant electron trapping at interfaces between Ge and Ge native oxide, nitride and oxynitride ITRs, and (ii) a methodology for eliminating native oxide, or nitride IRTs on Ge, and achieving direct contact between nanocrystalline HfO2 and non-crystalline high Si3N4 content Hf Si oxynitride alloys, and crystalline Ge substrates. We their combine spectroscopic studies, theory and modeling with electrical measurements to demonstrate the relative performance of qualitatively different nanocrystalline and non-crystalline gate dielectrics to MOS Ge test devices. (C) 2008 Elsevier B.V. All rights reserved
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