4.6 Article

Exploiting domain knowledge in system-level MPSoC design space exploration

Journal

JOURNAL OF SYSTEMS ARCHITECTURE
Volume 59, Issue 7, Pages 351-360

Publisher

ELSEVIER
DOI: 10.1016/j.sysarc.2013.05.023

Keywords

System-level design space exploration; Design space pruning; Genetic algorithms; MPSoC design

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System-level design space exploration (DSE), which is performed early in the design process, is of eminent importance to the design of complex multi-processor embedded multimedia systems. During system-level DSE, system parameters like, e.g., the number and type of processors, and the mapping of application tasks to architectural resources, are considered. The number of design instances that need to be evaluated during such DSE to find good design candidates is large, making the DSE process time consuming. Therefore, pruning techniques are needed to optimize the DSE process, allowing the DSE search algorithms to either find the design candidates quicker or to spend the same amount of time to evaluate more design points and thus improve the chance of finding even better candidates. In this article, we study several novel approaches that exploit domain knowledge to optimize the DSE search process. To this end, we focus on DSE techniques based on genetic algorithms (GA) and introduce two new extensions to a GA to optimize its search behavior. Experimental results demonstrate that the extended GAs perform at least as well, but typically significantly better than a reference (non-optimized) GA. (C) 2013 Elsevier B.V. All rights reserved.

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