Journal
JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS
Volume 3, Issue 1, Pages 3-11Publisher
AMER SCIENTIFIC PUBLISHERS
DOI: 10.1166/jno.2008.002
Keywords
computation; logic; spintronics; transistors; CMOS; cellular automata; majority gate; manganites; quantum mechanics; power dissipation; scaling; Heisenberg model
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Spintronics logic devices based on majority gates formed by atomic-level arrangements of spins in the crystal lattice is considered. The dynamics of switching is modeled by time-dependent solution of the density-matrix equation with relaxation. The devices are shown to satisfy requirements for logic. Switching speed and dissipated energy are calculated and compared with electronic transistors. The simulations show that for the highly idealized case assumed here, it is possible to trade off speed for switching energy and achieve lower power operation than ultimately scaled CMOS devices.
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