Hystersis mechanism in perovskite photovoltaic devices and its potential application for multi-bit memory devices

The hysteresis in perovskites devices puzzled researchers because it was a big hurdle for device stability and the origin of it was still a riddle for people to solve. Here we reported our analysis in mechanism of the hysteresis based on the trap states in the perovskites film surface. We tried to explain the current hysteresis through the dynamic charge trapping-detrapping processes and the conclusion applied both in porous and planar structure devices. However, the proportion of deep traps and shallow traps are different in planar structure device and in porous structure device. Furthermore, we found perovskite devices has potentials of serving as memory devices due to the photocurrent hysteresis. The on/off ratio of memory based on perovskite can be higher than 60 and the write time was as low as 0.54 s as memory. It also had a very low read bias near 0 V. Moreover, the devices show multi-bit property and a multi-bit organic memory came forward as a novel application of perovskite devices. (C) 2015 Elsevier B.V. All rights reserved.