4.7 Article

Line laser lock-in thermography for instantaneous imaging of cracks in semiconductor chips

Journal

OPTICS AND LASERS IN ENGINEERING
Volume 73, Issue -, Pages 128-136

Publisher

ELSEVIER SCI LTD
DOI: 10.1016/j.optlaseng.2015.04.013

Keywords

Laser lock-in thermography; Line laser scanning; Semiconductor chip inspection; Baseline-free crack detection; Holder exponent analysis

Categories

Funding

  1. Climate Change Research Hub of Korea Advanced Institute of Science and Technology [N01150138]
  2. Samsung Electronics Co., Ltd.
  3. Ministry of Science, ICT & Future Planning, Republic of Korea [N01150138] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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This study proposes a new line laser lock-in thermography (LLT) technique for instantaneous inspection of surface cracks in semiconductor chips. First, a new line LLT system is developed by integrating a line scanning laser source, a high-speed infrared (IR) camera with a close-up lens, and a control computer. The proposed line LLT system scans a line laser beam onto a target semiconductor chip surface and measures the corresponding thermal wave propagation using an IR camera. A novel baseline-free crack visualization algorithm is then proposed so that heat blocking phenomena caused by crack formation can be automatically visualized and diagnosed without relying on the baseline data obtained from the pristine condition of a target semiconductor chip. The proposed inspection technique offers the following advantages over the existing semiconductor chip inspection techniques: (1) inspection is performed in a noncontact, nondestructive and nonintrusive manner; (2) the crack diagnosis can be accomplished using only current-state thermal images and thus past thermal images are unnecessary; and (3) crack detectability is significantly enhanced by achieving high spatial resolution for thermal images and removing undesired noise components from the measured thermal images. Validation tests are performed on two different types of semiconductor die chips with real micro-cracks produced during actual fabrication processes. The experiments demonstrate that the proposed line LLT technique can successfully visualize and detect semiconductor chip cracks with width of 28-54 mu m. (C) 2015 Elsevier Ltd. All rights reserved.

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