Modeling and Analysis of Room-Temperature Silicon Quantum Dot-Based Single-Electron Transistor Logic Gates

In this paper, we have modeled silicon quantum dot-based single-electron transistor (SETs) operating at room temperature and investigated the effect of the quantum dot's (QD) energy-level broadening on the performance of the SET. First we obtained the energy levels and corresponding wave functions for spherical Si QDs by solving the coupled Schrodinger-Poisson equations in three dimensions. Then, we demonstrated different tunneling current rates for separated energy-levels by considering non-equal energy-level broadenings. Accordingly, an expression for corresponding tunneling rates in the quantum Coulomb blockade regime was derived. In the next step, the transconductance characteristics of the Si QD SET device with Coulomb oscillations were simulated, and their differences from the previously investigated metal based SETs were demonstrated. Having utilized these characteristics, CMOS-type circuit architectures for the Si SET-based inverter, XOR and XNOR logic gates were designed and their room-temperature operation abilities were simulated and clarified using Monte Carlo approach.