Journal
JOURNAL OF APPLIED PHYSICS
Volume 116, Issue 10, Pages -Publisher
AMER INST PHYSICS
DOI: 10.1063/1.4895487
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Funding
- National Research Foundation Singapore through the Singapore MIT Alliance for Research and Technology's Low Energy Electronic Systems (LEES) IRG
- Silicon Technologies Center of Excellence (Si-COE)
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A scalable method to fabricate germanium on insulator (GOI) substrate through epitaxy, bonding, and layer transfer is reported. The germanium (Ge) epitaxial film is grown directly on a silicon (Si) (001) donor wafer using a three-step growth approach in a reduced pressure chemical vapour deposition. The Ge epilayer is then bonded and transferred to another Si (001) wafer to form the GOI substrate. The Ge epilayer on GOI substrate has higher tensile strain (from 0.20% to 0.35%) and rougher surface (2.28 times rougher) compared to the Ge epilayer before transferring (i. e., Ge on Si wafer). This is because the misfit dislocations which are initially hidden along the Ge/Si interface are now flipped over and exposed on the top surface. These misfit dislocations can be removed by either chemical mechanical polishing or annealing. As a result, the Ge epilayer with low threading dislocations density level and surface roughness could be realized. (C) 2014 AIP Publishing LLC.
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