4.6 Article

Defect assistant band alignment transition from staggered to broken gap in mixed As/Sb tunnel field effect transistor heterostructure

Journal

JOURNAL OF APPLIED PHYSICS
Volume 112, Issue 9, Pages -

Publisher

AMER INST PHYSICS
DOI: 10.1063/1.4764880

Keywords

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Funding

  1. National Science Foundation [ECCS-1028494]
  2. Intel Corporation
  3. Div Of Electrical, Commun & Cyber Sys
  4. Directorate For Engineering [1028494] Funding Source: National Science Foundation

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The compositional dependence of effective tunneling barrier height (E-beff) and defect assisted band alignment transition from staggered gap to broken gap in GaAsSb/InGaAs n-channel tunnel field effect transistor (TFET) structures were demonstrated by x-ray photoelectron spectroscopy (XPS). High-resolution x-ray diffraction measurements revealed that the active layers are internally lattice matched. The evolution of defect properties was evaluated using cross-sectional transmission electron microscopy. The defect density at the source/channel heterointerface was controlled by changing the interface properties during growth. By increasing indium (In) and antimony (Sb) alloy compositions from 65% to 70% in InxGa1-xAs and 60% to 65% in GaAs1-ySby layers, the E-beff was reduced from 0.30 eV to 0.21 eV, respectively, with the low defect density at the source/channel heterointerface. The transfer characteristics of the fabricated TFET device with an E-beff of 0.21eV show 2x improvement in ON-state current compared to the device with E-beff of 0.30 eV. On contrary, the value of E-beff was decreased from 0.21 eV to -0.03 eV due to the presence of high defect density at the GaAs0.35Sb0.65/In0.7Ga0.3As heterointerface. As a result, the band alignment was converted from staggered gap to broken gap, which leads to 4 orders of magnitude increase in OFF-state leakage current. Therefore, a high quality source/channel interface with a properly selected E-beff and well maintained low defect density is necessary to obtain both high ON-state current and low OFF-state leakage in a mixed As/Sb TFET structure for high-performance and lower-power logic applications. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4764880]

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