Analysis of Silicon via Hole Drilling for Wafer Level Chip Stacking by UV Laser

For stacking wafers/dies, through-silicon-vias (TSVs) need to be created fiar electrical connection of each wafer/die, which enables better electrical characteristic's and less footprints. And :for via hole processing, chemical methods such as DRIE (Deep Reactive Ion Etching) are mostly used. These methods suffer the problems of slow processing speed. lacing environment-unfriendly and damage on the existing electric circuits due to high process temperature. Furthermore, masks are also needed. To find an alternative to the methods, researches on the laser (billing of via holes on silicon wafer are being conducted. This paper investigates the silicon via hole drilling process using laser beam. The percussion drilling method is used for this investigation. It is also examined how the laser parameters- laser power pulse frequency the number of laser pulses and the diameter of laser beam- have an influence on the drilling depth, the hole diameter and the quality of via holes. From these results, laser chilling process is optimized. The via hole made by UV laser on the crystal silicon wafer is 100 mu m deep. has the diameter of 27.2 mu m on the top, 12.9 mu m at the bottom. These diameters deviate from the target values by 2.8 mu m and 0.4 mu m respectively. These values correspond to the deviation from the target taper angle of the via hole by less than 1 degrees. The processing speed of the laser via hole chilling is 114mm/sec. there:hare. etching process can be replaced by this method if the number of via holes on a wafer is smaller than 470.588. The ablation threshold fluency of silicon is also determined by a FEM model and is verified by experiment.