Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 34, Issue 5, Pages 4000-4004Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2018.2871032
Keywords
Fixed-length transfer delay; frequency-locked loop (FLL); frequency variations; grid synchronization; single-phase systems
Categories
Funding
- National Young Natural Science Foundation of China [51707140]
- Natural Science Basic Research Plan in Shaanxi Province of China [2018JQ5061]
- Fundamental Research Funds for Central Universities [JBX170416, XJS17037]
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This letter presents an adaptive frequency-locked loop (FLL) with fixed-length transfer delay units for single-phase systems. By analyzing the relationship between the grid voltage and its transfer delay signals, a linear regression model of the grid voltage is established. Accordingly, a transfer delay based adaptive FLL (TD-AFLL) is proposed. A mathematic proof indicates that the proposed TD-AFLL can reject both phase offset errors and double-frequency oscillatory errors. Thus, the grid voltage parameters can be estimated accurately, even when the frequency drifts away from its nominal value. Moreover, fast dynamics of the TD-AFLL are achieved due to the transfer delay structure. Experiments verify the effectiveness of the proposed method.
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