Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 27, Issue 8, Pages 3472-3481Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2012.2187800
Keywords
Modular multilevel converter (MMC); pulse width modulation (PWM); voltage balancing
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In this paper, an improved pulse width modulation (PWM) method for chopper-cell (or half-bridge)- based modular multilevel converters (MMCs) is proposed. This method can generate an output voltage with maximally 2N+1 (where N is the number of submodules in the upper or lower arm of MMC) levels, which is as great as that of the carrier-phase-shifted PWM (CPSPWM) method. However, no phase-shifted carrier is needed. Compared with the existing submodule unified pulse width modulated (SUPWM) method, the level number of the output voltage is almost doubled and the height of the step in the staircase voltage is reduced by 50%. Meanwhile, the equivalent switching frequency in the output voltage is twice that of the conventional SUPWM method. All these features lead to much reduced harmonic content in the output voltage. What is more, the voltages of the submodule capacitors can be well balanced without any close-loop voltage balancing controllers which are mandatory in the CPSPWM schemes. Simulation and experimental results on a MMC-based inverter show validity of the proposed method.
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