4.5 Article

Design and Tests of the Vertically Integrated Photon Imaging Chip

Journal

IEEE TRANSACTIONS ON NUCLEAR SCIENCE
Volume 61, Issue 1, Pages 663-674

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNS.2013.2294673

Keywords

3D-IC technology; CMOS; integrated circuits; pixel detector; radiation imaging detectors; readout electronics; TSV; vertically integrated circuits; X-rays imaging detectors

Funding

  1. U.S. Department of Energy [DE-AC02-07CH11359]
  2. U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences [DE-AC02-98CH10886]
  3. National Science Center [DEC-2011/01/B/ST7/05155]
  4. EU FP7 AIDA program [262025]
  5. Polish Ministry of Science and Higher Education [2225/7.PR/2011/2]

Ask authors/readers for more resources

The Vertically Integrated Photon Imaging Chip (VIPIC) project explores opportunities of the three-dimensional integration for imaging of X-rays. The design details of the VIPIC1 chip are presented and are followed by results of testing of the chip. The VIPIC1 chip was designed in a 130 nm process, in which through silicon vias are embedded right after the front-end-of-line processing. The integration of tiers is achieved by the Cu-Cu thermo-compression or Cu-based oxide-oxide bonding. The VIPIC1 readout integrated circuit was designed for high timing resolution, pixel based, X-ray Photon Correlation Spectroscopy experiments typically using 8 keV X-rays at a synchrotron radiation facility. The design was done for bonding a Silicon pixel detector, however other materials can be serviced as long as the positive polarity of charge currents is respected.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.5
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available