Journal
IEEE TRANSACTIONS ON NUCLEAR SCIENCE
Volume 60, Issue 5, Pages 3843-3851Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNS.2013.2280660
Keywords
Analog-to-digital converter (ADC); DEPFET sensor with signal compression (DSSC); pixel level; X-ray imager; X-ray free electron laser (XFEL)
Funding
- XFEL GmbH in the framework of the DSSC project
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A pixel-level 8-bit 5-MS/s Wilkinson-type analog-to-digital converter was designed and fabricated in the IBM 8M1P 130-nm CMOS technology. The pixel blocks are implemented with a core area of 130 mu m by 140 mu m, consuming about 560 mu W at 1.2 V. Taking the measured dynamic range of 0.86 V into account, a signal-to-noise ratio above 65 dB was achieved for small signal amplitudes. The maximum differential and integral nonlinearity remains well below 0.4 LSB and 0.5 LSB, respectively. The conversion time is 160 ns, and the energy per conversion step 470 fJ. The digitizer permits the trimming of gain and offset.
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