Journal
IEEE TRANSACTIONS ON NANOTECHNOLOGY
Volume 13, Issue 3, Pages 464-468Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNANO.2014.2310774
Keywords
Beyond CMOS; field emission; insulated-gate; monolithic integration; more than Moore; vacuum field emission transistor (VFET)
Categories
Funding
- Center Innovation Fund at NASA Ames Research Center
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Co-fabrication of a nanoscale vacuum field emission transistor (VFET) and a metal-oxide-semiconductor field effect transistor (MOSFET) is demonstrated on a silicon-on-insulator wafer. The insulated-gate VFET with a gap distance of 100 nm is achieved by using a conventional 0.18-mu m process technology and subsequent photoresist ashing process. The VFET shows a turn-on voltage of 2 V at a cell current of 2 nA and a cell current of 3 mu A at the operation voltage of 10 V with an ON/OFF current ratio of 10(4). The gap distance between the cathode and anode in the VFET is defined to be less than the mean free path of electrons in air, and consequently, the operation voltage is reduced to be less than the ionization potential of air molecules. This allows the relaxation of the vacuum requirement. The present integration scheme can be useful as it combines the advantages of both structures on the same chip.
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