Journal
IEEE TRANSACTIONS ON NANOTECHNOLOGY
Volume 8, Issue 5, Pages 650-653Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNANO.2009.2021995
Keywords
FET logic devices; FET memory integrated circuits; memories; nanotechnology
Categories
Funding
- National R&D Project for Nano Science and Technology [10022916-200622]
- Center for Integrated-Nano-Systems (CINS) of the Korea Research Foundation [KRF-2006-005-J03601]
- Korea Ministry of Commerce, Industry and Energy
- Korea Science and Engineering Foundation (KOSEF) [R0A-2005-000-10045-02 (2007)]
- Nano RD Program [M10703000980-07M0300-98010]
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Gold nanoparticles synthesized by a colloidal method were deposited in an Al(2)O(3) dielectric layer of an omega-gated single ZnO nanowire FET. These gold nanoparticles were utilized as localized trap sites. The adsorption of the gold nanoparticles on an Al(2)O(3)-coated ZnO nanowire was confirmed by high-resolution transmission electron microscopy. In this study, a hybrid nanoparticle-nanowire device was fabricated by conventional Si processing. Its electrical characteristics indicated that electrons in the conduction band of the ZnO nanowire can be transported to the localized trap sites by gold nanoparticles for gate voltages greater than 1 V, through the 10-nm-thick Al(2)O(3) tunneling oxide layer.
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