Journal
MATERIALS LETTERS
Volume 144, Issue -, Pages 97-99Publisher
ELSEVIER
DOI: 10.1016/j.matlet.2015.01.013
Keywords
Voids; Solder joint; Grain size; Defects; Electronic materials
Funding
- National Natural Science Foundation of China [51005055]
- Fundamental Research Funds for the Central Universities [HIT.NSRIF.2015066]
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Effect of Cu grain size on void formation at the interface of SAC305 (Sn3.0Ag0.5Cu)/Cu solder joint was studied. The joints with ED CCL (Electrodeposited Copper Clad Laminate) substrates exhibited a strong voiding tendency. But this tendency was significantly reduced after annealing treatment at 150 degrees C for 1000 h. At the same time, no voids were found at the interface of SAC305/HPOFC (High Purity Oxygen Free Copper, 99.9999 wt%) plate. It was found that the grain size of annealed ED CCL increased by two orders of magnitude than that of ED CCL, but it was just about half of the grain size of HPOFC plate. The smaller grain size of Cu could increase the amount of grain boundaries, thus increasing the amount of effective vacancies (EVs). Under gradient of concentration, these EVs would coalesce to form voids at the interface of Cu3Sn/Cu. Therefore, to lower the tendency of void formation at the interface, increasing the size of grain is an effective way. (C) 2015 Elsevier B.V. All rights reserved.
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