4.6 Article

A Nonlinear Electro-Thermal Scalable Model for High-Power RF LDMOS Transistors

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2008.2011172

Keywords

Field-effect transistor (FET); laterally defused MOS (LDMOS); nonlinear; transistor model

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A new nonlinear charge-conservative scalable dynamic electro-thermal compact model for laterally defused MOS (LDMOS) RF power transistors is described in this paper. The transistor is characterized using pulsed I-V and S-parameter measurements, to ensure isothermal conditions. A new extrinsic network and extrinsic parameter-extraction methodology is developed for high-power RF LDMOS transistor modeling, using manifold deembedding by electromagnetic simulation, and optimization of the extrinsic network parameter values over a broad frequency range. The intrinsic model comprises controlled charge and current sources that have been implemented using artificial neural networks, designed to permit accurate extrapolation of the transistor's performance outside of the measured data domain. A thermal sub-circuit is coupled to the nonlinear model. Large-signal validation of this new model shows a very good agreement with measurements at 2.14 GHz.

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