4.8 Article

Zero-Sequence Circulating Current Reduction Method for Parallel HEPWM Inverters Between AC Bus and DC Bus

Journal

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume 59, Issue 1, Pages 290-300

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2011.2106102

Keywords

Harmonic elimination; inverter; microgrid; parallel; zero-sequence circulating current

Funding

  1. National Science Council, Taiwan [NSC 98-2221-E-161-008]

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In this paper, a real-time circulating current reduction method for parallel harmonic-elimination pulsewidth modulation (HEPWM) inverters is proposed. HEPWM techniques are often used in high-capacity inverters. For instance, in a hybrid microgrid, the inverters are employed to transfer power between the dc and ac buses. If the inverters are in parallel operation, the zero-sequence path can be established, and the zero-sequence circulating current will circulate among the inverters. The proposed method installs a cascade null-vector control system behind the conventional three-phase HEPWM modulator. The proposed null-vector control system can be disabled to save switching losses when the zero-sequence circulating current is small, whereas it can be enabled when the zero-sequence circulating current becomes large. The proposed method does not affect the line-to-line voltage waveforms of HEPWM inverters, and it can easily enable/disable the null-vector control system to provide bumpless transfer. Compared with the conventional HEPWM with zero-sequence harmonics elimination, the proposed method can provide an extra 15% modulation index range. Results that were obtained from both simulation and experiments confirmed the performance and effectiveness of the proposed method.

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