Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 61, Issue 3, Pages 844-849Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2014.2298693
Keywords
Charge; charge transfer; charge-coupled devices; CMOS image sensors (CIS); deep submicrometer process; transfer inefficiency; trapped charge
Ask authors/readers for more resources
This paper presents measurements performed on charge-coupled device (CCD) structures manufactured on a deep micrometer CMOS imaging technology, in surface channel CCD and in buried channel CCD mode. The charge transfer inefficiency is evaluated for both CCD modes with regard to the injected charge, and the influence of the rising and falling time effect is explored. Controlling the ramp and especially reducing its abruptness allows to get much lower charge transfer inefficiency in buried CCD mode. On the contrary, we did not observe any effect of the ramp on surface channel CCD mode because of the presence of interface traps at the silicon-oxide interface.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available