4.6 Article

Impact of Scaling on the Performance of HfO2-Based Ferroelectric Field Effect Transistors

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 61, Issue 11, Pages 3699-3706

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2014.2354833

Keywords

28-nm technology node; emerging memory; ferroelectric field-effect transistor (FeFET); ferroelectric transistor; HfO2; metal-ferroelectric-insulator-semiconductor FET (MFIS-FET); nonvolatile memory; scaling

Funding

  1. European Fund for Regional Development through the European Commission
  2. Free State of Saxony through the HEIKO Project

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The recently discovered ferroelectric behavior of HfO2-based dielectrics yields the potential to overcome the main challenges of the ferroelectric field-effect transistors (FeFETs)-CMOS compatibility as well as scalability to the state-of-the-art technology nodes of logic transistors. In this paper, we study the impact of scaling on the memory performance of FeFET devices employing Si:HfO2 ferroelectric films. The operation capability was proven down to a gate length of 28 nm. Program/erase characteristics, endurance behavior, and retention properties were analyzed for FeFETs with gate lengths scaled down to 32 nm. The detected difference in the performance between the long and short channel devices could be for the most part attributed to transistor short channel effects. In addition, the effect of temperature on the device properties of Si:HfO2-based FeFETs was investigated in detail. The program/erase speed was ascertained to be independent of temperature. On the other hand, increase in temperature resulted in reduced initial memory window accompanied by its slightly accelerated decay with time.

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