An Explicit Analytical Solution to the Grain Boundary Barrier Height in Undoped Polycrystalline Semiconductor Thin-Film Transistors

Based on discrete grain analysis and U-shaped distribution of density of states (DOS) for grain boundary (GB) traps, a physical-based explicit analytical solution to the GB potential barrier height (psi(B)) is developed for undoped polycrystalline semiconductor thin-film transistors (TFTs). The explicit solution is derived using the Lambert W function, without additional approximations introduced. The validity and accuracy of the solution is demonstrated comparing the model with both numerical calculations and experimental psi(B) data of polycrystalline Si TFTs. Furthermore, it is found that a previous widely used Seto's model could be consistent to the proposed model in the above-threshold region, in this case deep states DOS dominates psi(B), where the monoenergetic trap density of Seto's model roughly corresponds to the deep states DOS multiplying by 3-4 units of the thermal energy kT. Finally, the analytical model is applied in ZnO TFTs.