4.6 Article

Optimized Ni Oxidation in 80-nm Contact Holes for Integration of Forming-Free and Low-Power Ni/NiO/Ni Memory Cells

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 56, Issue 10, Pages 2363-2368

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2009.2028378

Keywords

Integration; NiO memory; reset current; scaling

Funding

  1. IMEC's Industrial Affiliation Program on RRAM memory

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In this brief, we integrate oxygen-deficient NiO cells in 80-nm-wide contact holes using complementary metal-oxide-semiconductor-compatible Ni electrodes. Ni/NiO/Ni memory-cell arrays are forming free, and can be operated using very low reset current (< 50 mu A) and switching voltage (< 1 V). In contrast to metallic-type filaments formed at high-power switching, low-power switching involves high-resistance semiconducting filaments, probably consisting of oxygen-vacancy-rich paths. Retention tests carried out at 150 degrees C indicated excellent stability of both the high-and low-power set states. Drastic reduction of reset current is also demonstrated for single-contact cells with TiN top electrodes.

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