4.6 Article

Simulation of silicon nanowire transistors using Boltzmann transport equation under relaxation time approximation

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 55, Issue 3, Pages 727-736

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2007.913560

Keywords

Boltzmann transport equation (BTE); electrostatic scaling length; gate-all-around (GAA); MOSFET scaling; quasi-ballistic transport; relaxation time approximation (RTA); silicon nanowire transistors (SNWTs); subthreshold slope (SS); surrounding gate

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An efficient approach for the simulation of electronic transport in nanoscale transistors is presented based on the multi-subband Boltzmann transport equation under the relaxation time approximation, which takes into account the effects of quantum confinement and quasi-ballistic transport. This approach is applied to the study of electronic transport in circular gate-all-around silicon nanowire transistors. Comparison with the nonequilibrium Green's function method shows that the new method gives reasonably accurate terminal characteristics. We study the influence of silicon body diameter and gate length on the terminal current and subthreshold slope (SS). We have found that the calculated ON current is inversely proportional to the gate length to the power 1/2, and that the silicon body diameter should be smaller than roughly 2/3 of the channel length in order to maintain the SS within 80 mV/dec.

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