Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 55, Issue 6, Pages 1379-1385Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2008.920030
Keywords
high-k; interface trap density; N2O plasma power; Pr2O3; SiOxNy buffer layer; smooth interface; thin-film transistors (TFTs)
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In this paper, we have developed high-k Pr2O3 poly-Si thin-film transistors (TFTs) using different N2O plasma power treatments. High-k Pr2O3 poly-Si TFT devices using a 200-W plasma power exhibited better electrical characteristics in terms of high effective carrier mobility, high driving current, small subthreshold slope, and high I-ON/I-OFF current ratio. This result is attributed to the smooth Pr2O3/poly-Si interface and low interface trap density. Pr2O3 poly-Si TFT with a 200-W N2O plasma power also enhanced electrical reliabilities such as hot carrier and positive bias temperature instability. All of these results suggest that a high-k Pr2O3 gate dielectric with the oxynitride buffer layer is a good candidate for high-performance low-temperature poly-Si TFTs.
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