Journal
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
Volume 55, Issue 3, Pages 1530-1536Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCE.2009.5278023
Keywords
Motion estimation; gray-coding; bit truncation; hardware architecture; systolic arrays
Funding
- Scientific and Technical Research Council of Turkey (TUBITAK)
- Korean Research Foundation (KRF)
- TUBITAK [107E179]
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This paper proposes an efficient low bit-depth representation based motion estimation approach which is particularly suitable for low-power consumer electronics devices. In the proposed approach motion estimation is carried out using bit truncated gray-coded image pixels. The corresponding hardware architecture is also designed and presented in this paper to show the effectiveness of the proposed approach. It is shown that the proposed approach provides improved motion estimation accuracy compared to conventional bit-truncation based approaches that are directly applied to binary coded pixel values. The proposed approach uses simple Gray-coding, that has very low-complexity and can be applied on a pixel-by-pixel basis. Hence, the comparatively more complex transformation processes required in One Bit-Transform or Two-Bit Transform based low bit-depth representation ME approaches are avoided. Experimental results show that the proposed approach also outperforms such low bit-depth representation based motion estimation methods previously presented in the literature, in terms of motion estimation accuracy(1).
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