Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 65, Issue 10, Pages 1385-1389Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2018.2861723
Keywords
Electrocardiography; QRS detection; ECG-on-chip; low power design; wearable devices; wireless sensors
Categories
Funding
- NUS
- NSERC DG [NRF-CRP8-2011-01]
Ask authors/readers for more resources
This brief presents an ultra-low power single chip solution for electrocardiography (ECG) signal acquisition and processing in wearable ECG sensors. The chip contains a low noise preamplifier with embedded band-pass function, a programmable gain buffer, a 12-bit successive approximation ADC, a novel morphological filter based QRS detector, 8-Kb onchip SRAM, a control unit and MCU interfaces. The chip was designed and implemented in 0.35-mu m standard CMOS process. The analog core operates from 0.8 V to 1.8 V, while the digital circuits and SRAM operate from 1.5 V to 3.6 V. The chip has a total core area of 5.74 mm(2) and consumes 2.3 mu W. Small size and low power consumption make this chip suitable for usage in wearable ECG sensors. Apart from presenting the measurement results, we also successfully demonstrate a prototype wearable ECG device, for long term cardiac monitoring using the proposed ECG-on-chip.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available