4.7 Article

CMOS Startup Charge Pump With Body Bias and Backward Control for Energy Harvesting Step-Up Converters

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2013.2290823

Keywords

Body bias; energy harvesting; low voltage; startup charge pump; step-up converter; subthreshold operation

Funding

  1. NSF CDADIC
  2. NSF CAREER Award [ECCS-(ECCS-0845849)]
  3. KFRI (Korean Food Research Institute) uu-food project and the Korean Government [NRF-2011-220-(NRF-2011-220-D00084)]
  4. Directorate For Engineering
  5. Div Of Electrical, Commun & Cyber Sys [0845849] Funding Source: National Science Foundation
  6. National Research Council of Science & Technology (NST), Republic of Korea [E0142053305] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
  7. National Research Foundation of Korea [220-2011-1-D00084] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

Ask authors/readers for more resources

A new low voltage charge pump is developed to help start up a step-up converter in energy harvesting applications. The proposed charge pump is the first to utilize both backward control scheme and two branches of charge transfer switches (CTSs) to direct charge flow. The backward control scheme uses the internal boosted voltage to dynamically control the CTSs' gate, and the two branches utilize both NMOS and PMOS to implement their switching structure. The combination of backward control scheme and two-branch operation allows the CTSs to be completely turned on and off. Thus, the reverse charge sharing phenomenon and switching loss are significantly reduced, which effectively improves pumping efficiency. The last stage is specially designed to improve the charge pump's charge and capacitance drivability. Using subthreshold operation and body-bias technique, the charge pump and its clock generator can operate under a low voltage supply. The proposed charge pump circuit is designed in a standard 0.18 mu m CMOS process. It consists of 6 stages, each with a 24 pF pumping capacitor (total 288 pF pumping capacitance area). Under a 320 mV supply, the measured output voltage of the proposed charge pump can rise from 0 to 2.04 V within 0.1 milliseconds.

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