Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 57, Issue 10, Pages 2675-2684Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2010.2047750
Keywords
CMOS RF integrated circuits; low power; RF front end; system on chip (SoC)
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Funding
- MediaTek Inc., Singapore
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A receiver front end designed in 0.18-mu m CMOS consisting of a low-noise amplifier and IQ mixers is presented. The front end's power consumption is controllable from 5.0 down to 1.4 mA. It is proposed to push the receiver requirements to the front end in order to efficiently control the overall power consumption based on the real-time required noise performance. We show that, under good channel conditions, this front end can save up to 70% of its nominal power consumption.
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