4.7 Article Proceedings Paper

A Novel Low-Power-Implantable Epileptic Seizure-Onset Detector

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TBCAS.2011.2157153

Keywords

Algorithm; epilepsy; low noise; low power; microelectronics; seizure detector

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A novel implantable low-power integrated circuit is proposed for real-time epileptic seizure detection. The presented chip is part of an epilepsy prosthesis device that triggers focal treatment to disrupt seizure progression. The proposed chip integrates a front-end preamplifier, voltage-level detectors, digital demodulators, and a high-frequency detector. The preamplifier uses a new chopper stabilizer topology that reduces instrumentation low-frequency and ripple noises by modulating the signal in the analog domain and demodulating it in the digital domain. Moreover, each voltage-level detector consists of an ultra-low-power comparator with an adjustable threshold voltage. The digitally integrated high-frequency detector is tunable to recognize the high-frequency activities for the unique detection of seizure patterns specific to each patient. The digitally controlled circuits perform accurate seizure detection. A mathematical model of the proposed seizure detection algorithm was validated in Matlab and circuits were implemented in a 2 mm(2) chip using the CMOS 0.18-mu m process. The proposed detector was tested by using intracerebral electroencephalography (icEEG) recordings from seven patients with drug-resistant epilepsy. The seizure signals were assessed by the proposed detector and the average seizure detection delay was 13.5 s, well before the onset of clinical manifestations. The measured total power consumption of the detector is 51 mu W.

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