Journal
IEEE PHOTONICS TECHNOLOGY LETTERS
Volume 21, Issue 18, Pages 1302-1304Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LPT.2009.2025867
Keywords
Concatenated coding; field-programmable gate arrays (FPGAs); forward error correction (FEC); optical communication; Reed-Solomon (RS) codes
Funding
- Lambda Utility Project of the National Institute of Information and Communications Technology (NICT)
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The concatenation of low-density parity-check and Reed-Solomon codes for forward error correction has been experimentally demonstrated for the first time in this letter. Using a 2-bit soft-decision large-scale integration and high-speed field-programmable gate arrays, a net coding gain of 9.0 dB was achieved with 20.5% redundancy with four iterative decoding for an input bit-error rate of 8.9 x 10(-3) at 31.3 Gb/s.
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