Journal
IEEE PHOTONICS TECHNOLOGY LETTERS
Volume 21, Issue 5, Pages 337-339Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LPT.2008.2011649
Keywords
Bonding; flip-chip devices; optical interconnections
Funding
- EU
- IST-PICMOS project
Ask authors/readers for more resources
We present the design, fabrication, and characterization of a membrane coupler processed on an indium phosphide membrane layer on a silicon-on-insulator wafer, that is used for applications in optical interconnects on silicon. Measured coupler efficiency is 50%. The photonic device fabrication is compatible with wafer scale processing steps, guaranteeing compatibility towards future generation electronic integrated circuit processing.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available