Journal
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS
Volume 19, Issue 10, Pages 674-676Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LMWC.2009.2029760
Keywords
Low noise amplifier (LNA); on-chip antenna; receiver
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This letter presents the smallest reported 5 GHz receiver chip (1.3 mm(2)) with an on-chip antenna in standard 0.13 mu m CMOS process. The miniaturization is achieved by placing the circuits inside a meandered antenna. The on-chip antenna is conjugately matched to the low noise amplifier (LNA) over a wide frequency range. The design methodology for co-design of the on-chip antenna and LNA is described. The LNA is completely differential, consumes only 8 mW of power and provides a gain of 21 dB. Design tradeoffs and measurement challenges are given.
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