☆
4.6
Article
Proceedings Paper
Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2010)
Rate this paper
The primary rating indicates the level of overall quality for the paper. Secondary ratings independently reflect strengths or weaknesses of the paper.
Create your own webinar
Interested in hosting your own webinar? Check the schedule and propose your idea to the Peeref Content Team.
Create NowAsk a Question. Answer a Question.
Quickly pose questions to the entire community. Debate answers and get clarity on the most important issues facing researchers.
Get Started