4.6 Article

A 128x128 120 dB 15 μs latency asynchronous temporal contrast vision sensor

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 43, Issue 2, Pages 566-576

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2007.914337

Keywords

address-event representation (AER); asynchronous vision sensor; high-speed imaging; image sensors; machine vision; neural network hardware; neuromorphic circuit; robot vision systems; visual system; wide dynamic range imaging

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This paper describes a 128 x 128 pixel CMOS vision sensor. Each pixel independently and in continuous time quantizes local relative intensity changes to generate spike events. These events appear at the output of the sensor as an asynchronous stream of digital pixel addresses. These address-events signify scene reflectance change and have sub-millisecond timing precision. The output data rate depends on the dynamic content of the scene and is typically orders of magnitude lower than those of conventional frame-based imagers. By combining an active continuous-time front-end logarithmic photoreceptor with a self-timed switched-capacitor differencing circuit, the sensor achieves an array mismatch of 2.1 % in relative intensity event threshold and a pixel bandwidth of 3 kHz under 1 klux scene illumination. Dynamic range is > 120 dB and chip power consumption is 23 mW. Event latency shows weak light dependency with a minimum of 15 mu s at > 1 klux pixel illumination. The sensor is built in a 0.35 mu m 4M2P process. It has 40x40 mu m(2) pixels with 9.4% fill factor. By providing high pixel bandwidth, wide dynamic range, and preciely timed sparse digital output, this silicon retina provides an attractive combination of characteristics for low-latency dynamic vision under uncontrolled illumination with low post-processing requirements.

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