4.7 Article

Integration and Packaging of a Macrochip With Silicon Nanophotonic Links

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSTQE.2010.2091674

Keywords

CMOS; computing; macrochip; nanophotonics; optical interconnects; routers; silicon photonics; switching; very large scale integration (VLSI)

Funding

  1. Microsystems Technology Office [HR001108-09-0001]
  2. Defense Advanced Research Projects Agency

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The technologies associated with integration and packaging have a significant impact on the overall system. In this paper, we review a silicon photonic macrochip system and its associated packaging that will allow dense wavelength-division multiplexed optical links to be intimately integrated and co-manufactured with the switching electronics. For this to happen, we anticipate a number of integration and packaging advances.

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