Photonic Transitions (1.4 eV-2.8 eV) in Silicon p(+)np(+) Injection-Avalanche CMOS LEDs as Function of Depletion Layer Profiling and Defect Engineering

p(+)np(+) CMOS Si LED structures were modeled in order to investigate the effect of various depletion layer profiles and defect engineering on the photonic transitions in the 1.4-2.8 eV, 450-750 nm regime. Modeling shows that by utilizing a short linear increasing E-field in the p(+)n reverse-biased junction with a gradient of approximately 5 x 10(5) V cm(-1), mu m(-1), and injecting carriers from an adjacent p(+)n junction, increased localized optical yield by a factor 50-100. A number of device designs were realized using CMOS 0.35 mu m technology. The device design involves normal CMOS design and processing procedures with no excessive microdimensioning. The current devices operated in the 6-8 V, 1 mu A-2 mA regime, and yield emission intensities of up to 100 nW mu m(-2). The current emission levels are about three orders higher than the low-frequency detectability limit of Si CMOS p-n detectors of corresponding area, which make diverse electro-optical applications such as MOEMS devices, and diverse optical signal processing and wave-guiding and the development of smart chips feasible in standard CMOS integrated circuitry.