Journal
IEEE ELECTRON DEVICE LETTERS
Volume 35, Issue 1, Pages 108-110Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2013.2291785
Keywords
Monolithic transformer; 3D TSV transformer; high-voltage isolation; digital isolator
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Funding
- Fuji Electric Co., Ltd [FEDT02-37S01010/11PN]
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A simple low cost monolithic 3D through-silicon-via coreless transformer is designed and fabricated for high-voltage gate driver applications. The transformer comprises the primary coil embedded in the bottom layer of a Si substrate and the secondary coil built on the front-side of the substrate. Compared with conventional transformers with both coils built on the front-side or at the backside, the proposed structure has the advantages of area-saving and cost-effectiveness. A coreless transformer with primary, secondary, and mutual inductances of 260, 280, and 112 nH, respectively, is fabricated in a small area of 2 mm(2). It achieves both high galvanic isolation (>4 kV) and satisfactory voltage gain (0.41 from 4 to 45 MHz).
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