Journal
IEEE ELECTRON DEVICE LETTERS
Volume 35, Issue 1, Pages 138-140Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2013.2290117
Keywords
Ferroelectric; ZrHfO; 1T; DRAM; FeMOS; MOSFET; memory
Categories
Funding
- National Science Council of Taiwan
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The power consumption of capacitor leakage current, increase of the capacitor aspect ratio, and lack of higher dielectric constant (kappa) material are the difficult challenges to downscaling dynamic random access memory (DRAM). This letter reports a new one-transistor ferroelectric-MOSFET (1T FeMOS) device that displays DRAM functions of a 5 ns switching time, 10(12) on/off endurance cycles, and 30 times on/off retention windows at 5 s and 85 degrees C. A simple 1T process and a considerably low OFF-state leakage of 3 x 10(-12) A/mu m were achieved. This novel device was achieved by applying ferroelectric ZrHfO gate dielectric to a p-MOSFET, which is fully compatible with existing high-kappa CMOS processing.
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