Journal
IEEE ELECTRON DEVICE LETTERS
Volume 34, Issue 4, Pages 523-525Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2013.2247737
Keywords
Gate-all-around (GAA); nanowire (NW); single-crystal-like (SCL); thin film transistor (TFT)
Categories
Funding
- MOE-ATU
- NSC, Taiwan
Ask authors/readers for more resources
We investigate the characteristics of single-crystallike (SCL) poly-Si nanowire (SCL poly-Si NW) thin-film-transistors with gate-all-around (GAA) structures. The GAA SCL poly-Si NWs are prepared by a modified sidewall spacer process utilizing an amorphous silicon (alpha-Si) mesa structure. The combination of the high surface-to-volume ratio of the NW and a nominal gate length of 0.25 mu m lead to clear improvement in electrical performance, including a steep subthreshold swing (90 +/- 15 mV/dec), a virtual absence of drain-induced barrier lowering (21 +/- 13 mV/V), and a very high ON/OFF current ratio similar to 7 x 10(7) (V-D = 1 V, V-G = 3 V).
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available