Journal
IEEE ELECTRON DEVICE LETTERS
Volume 32, Issue 4, Pages 500-502Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2104133
Keywords
Electric double layer (EDL); homojunction; in-plane gate thin-film transistors (TFTs); low voltage; SiO2-based solid electrolyte
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Funding
- Foundation for the Author of National Excellent Doctoral Dissertation of PR China [200752]
- Natural Science Foundation of Zhejiang Province [0804201051]
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In-plane gate homojunction thin-film transistors (TFTs) with patterned channel are self-assembled on SiO2-based solid electrolytes with only one nickel shadow mask. All indium-tin oxide channel and electrodes (source, drain, and gate) are deposited simultaneously by one-step magnetron sputtering, and no alignment is necessary. Such TFTs exhibited a good performance with a low operation voltage of 2.0 V, a large field-effect mobility of 28.7 cm(2)/V . s, a low subthreshold swing of 125 mV/decade, and a large on-off ratio of 1.3 x 10(6), respectively. A two-serial-capacitor model for the low-voltage operation mechanism is proposed and discussed.
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