Journal
IEEE ELECTRON DEVICE LETTERS
Volume 32, Issue 6, Pages 719-721Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2011.2131631
Keywords
Crossbar architecture; nonvolatile memory; resistive-switching random access memory (RRAM)
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Resistive-switching random access memory (RRAM) devices are attracting increasing interest as a potential candidate for high-density nonvolatile memory devices. One of the main issues toward RRAM feasibility is the reduction of the reset current I(reset) necessary to restore the high-resistance state in the device. I(reset) can be reduced by controlling the size of the conductive filament responsible for the low-resistance state; however, available data only focus on direct-current reset analysis. This letter addresses I(reset) reduction under pulsed operation. Unstable reset behaviors, including set-reset and set instability, are shown to occur during relatively fast pulses and starting from set states with relatively large resistance values. These instability effects limit I(reset) reduction, posing a potential issue of minimum reset current achievable in RRAM devices.
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