Journal
IEEE ELECTRON DEVICE LETTERS
Volume 31, Issue 8, Pages 797-799Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2051405
Keywords
Bistable resistor (biristor); n-p-n; p-n-p; silicon nanowire; two terminals
Categories
Funding
- Ministry of Education, Science and Technology [2009-0082583]
- Korea Government [2009-0083079]
- National Research Foundation of Korea [2009-0082583, 2007-0056950] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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A circuit element, named bistable resistor (or biristor), is proposed. The biristor has two stable resistance states. A high resistance state and low leakage current are maintained until an applied voltage reaches a latch-up voltage to trigger an avalanche effect. A low resistance state and high current are attained at voltage above the latch up. The low resistance state is latched until the applied voltage decreases down to the latch-down voltage. Bistable resistance states are achieved between the latch-down and the latch-up voltage. In addition, an optical stimulus appears to reduce the latch voltages.
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