Related references
Note: Only part of the references are listed.A High-Voltage LDMOS Compatible With High-Voltage Integrated Circuits on p-Type SOI Layer
Xiaorong Luo et al.
IEEE ELECTRON DEVICE LETTERS (2009)
Realization of High Voltage (> 700 V) in New SOI Devices With a Compound Buried Layer
Xiaorong Luo et al.
IEEE ELECTRON DEVICE LETTERS (2008)
A novel 700-V SOI LDMOS with double-sided trench
Xiaorong Luo et al.
IEEE ELECTRON DEVICE LETTERS (2007)
A new structure and its analytical model for the electric field and breakdown voltage of SOI high voltage device with variable-k dielectric buried layer
Xiaorong Luo et al.
SOLID-STATE ELECTRONICS (2007)
Thermal conductivity of ultra low-k dielectrics
A Delan et al.
MICROELECTRONIC ENGINEERING (2003)
The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors
CH Ren et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2002)
Share Paper
