Journal
IEEE ELECTRON DEVICE LETTERS
Volume 31, Issue 10, Pages 1077-1079Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2058838
Keywords
Fermi depinning; Schottky barrier; specific contact resistivity; tunneling barrier
Categories
Funding
- Intel Corporation
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Recent experiments have demonstrated the possibility of reducing the effect of Fermi level pinning by using a thin dielectric tunneling barrier. For contacts to n-Ge where the Fermi level of metals pins near the valence band, alleviation of Fermi pinning has the potential to reduce the specific contact resistivity since the Schottky barrier is reduced. However, using a tunnel barrier to alleviate Fermi pinning also leads to the addition of tunneling resistance at the contact. This letter studies theoretically the effect of this added tunneling resistance on the overall specific contact resistivity. Different dielectric materials are studied in order to understand the feasibility and limitations of this technique in making good ohmic contacts to n-type Ge.
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