Journal
IEEE ELECTRON DEVICE LETTERS
Volume 31, Issue 11, Pages 1193-1195Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2065792
Keywords
Field-effect mobility; field-effect transistor (FET); graphene; n-FET; p-FET; Si MOSFET; SOI MOSFET
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Funding
- Defense Advanced Research Projects Agency (DARPA) [N66001-08-C-2048]
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In this letter, we report the first experimental demonstration of wafer-scale ambipolar field-effect transistor (FET) on Si (111) substrates by synthesizing a graphene layer on top of 3C-SiC(111)/Si(111) substrates. With lateral scaling of the source-drain distance to 1 mu m in a top-gated layout, the ON-state current of 225 mu A/mu m and peak transconductance of > 40 mu S/mu m were obtained at Vds = 2 V, which is the highest performance of graphene-on-Si FETs. The peak field-effect mobilities of 285 cm(2)/Vs for holes and 175 cm(2)/Vs for electrons were demonstrated, which is higher than that of ultra-thin-body SOI (n, p) MOSFETs.
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