4.6 Article

Realization of High Voltage (> 700 V) in New SOI Devices With a Compound Buried Layer

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 29, Issue 12, Pages 1395-1397

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2008.2007307

Keywords

Electric fields; high-voltage techniques; power semiconductor devices; semiconductor-insulator-semiconductor devices; silicon-on-insulator (SOI) technology

Funding

  1. NSFC [60436030, 60906025, jx0721]

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A novel silicon-on-insulator (SOI) high-voltage device with a compound buried layer (CBL SOI) consisting of two oxide layers and a polysilicon layer between them is proposed. Its breakdown characteristic is investigated theoretically and experimentally. Theoretically, its vertical breakdown voltage (BV) is shared by two oxide layers; furthermore, the electric field in the lower buried oxide layer of E-I2 is increased from about 78 to 454 V/mu m by holes collected on the bottom interface of the polysilicon. Both result in an enhanced BV. Experimentally, 762-V SOT diode is obtained. The maximal temperature of CBL SOT diode is reduced by 16.9 K because a window in the upper buried oxide layer alleviates the self-heating effect.

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