4.6 Article

A Monolithically Integrated On-Chip Antenna in 0.18 mu m Standard CMOS Technology for Far-Field Short-Range Wireless Powering

Journal

IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS
Volume 9, Issue -, Pages 631-633

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LAWP.2010.2052450

Keywords

On-chip antenna; radiation pattern measurement; wireless powering

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This letter presents a monolithically integrated on-chip antenna fabricated in 0.18 mu m standard CMOS technology. As the antenna is used for power scavenging in a passive chip, it is designed to be matched with the rectifier circuit. The letter describes the important design considerations and the antenna characterization through measurements.

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